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Low power ADC
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Low power successive-approximation ADC
This IP describes a general purpose Analog to Digital Converter (ADC) for low-power applications. The converter is a charge-redistribution successive-approximation type converter.
The key feature of this ADC is its low power consumption. This is achieved by using an energy-efficient comparator and by making all circuitry dynamic. As a result, quiescent current is avoided and the power consumption is fully proportional to the sample-rate. This property makes the ADC ideal for low duty-cycle sensor applications and other applications benefiting from low power consumption.
The converter can operate in both single-ended and differential mode, making it suitable for a broad range of applications.
This IP product is silicon proven.
Block diagram
Features
- Sample-rate up to 10 MS/s
- Low power consumption,
proportional to sample-rate: 740 µW @ 10 MS/s, 7.4 µW @ 100 kS/s - Single-ended and differential mode
- 10.5 ENOB
- >80 dB SFDR (including THD)
- 0.15 mm2 in baseline 0.18 μm CMOS
- Rail-to-rail input range
- Silicon proven
Applications
- Low power applications
- Sensor applications
- Radio baseband processing
